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authorPaweł Dybiec <pdybiec@stud.cs.uni.wroc.pl>2018-12-10 01:20:41 +0100
committerPaweł Dybiec <pdybiec@stud.cs.uni.wroc.pl>2018-12-10 01:20:41 +0100
commit0f80191205b439ead05f8c07e6e8117a18519571 (patch)
treeb7c4eeabcd4a8f9c879be20ff9087c52138c2912
parent4c7ca4031d431af712bbdd9b0dbc9b3e069280e4 (diff)
Strings, declarations and fixed ifs
-rw-r--r--source/mod_student/translator.ml39
1 files changed, 35 insertions, 4 deletions
diff --git a/source/mod_student/translator.ml b/source/mod_student/translator.ml
index c755cdb..163d312 100644
--- a/source/mod_student/translator.ml
+++ b/source/mod_student/translator.ml
@@ -130,6 +130,13 @@ module Make() = struct
| Ast.EXPR_Bool {value; _} ->
current_bb, E_Int (int32_of_bool value)
+ | Ast.EXPR_String {value;_} ->
+ let reg =allocate_register() in
+ append_instruction current_bb @@ I_NewArray ( reg,E_Int (Int32.of_int @@ (1+String.length value)));
+ String.iteri (fun i c ->
+ append_instruction current_bb @@ I_StoreArray (E_Reg reg, E_Int (Int32.of_int i), E_Int (Int32.of_int @@ Char.code c))) value;
+ append_instruction current_bb @@ I_StoreArray ( E_Reg reg, E_Int (Int32.of_int (String.length value)), E_Int (Int32.of_int 0) );
+ current_bb, E_Reg reg
| Ast.EXPR_Binop {lhs;rhs;op=Ast.BINOP_Add;tag;_} ->
let reg= allocate_register() in
@@ -211,9 +218,12 @@ module Make() = struct
| Ast.EXPR_Binop {op=Ast.BINOP_Or;lhs;rhs;_} ->
let bb = allocate_block() in
+ let success = allocate_block() in
let current_bb = translate_condition env current_bb bb lhs in
- let current_bb = translate_condition env bb else_bb in
- bb
+ let bb = translate_condition env bb else_bb rhs in
+ set_jump bb success;
+ set_jump current_bb success;
+ success
(* Zaimplementuj dodatkowe przypadki *)
@@ -254,16 +264,37 @@ module Make() = struct
let current_bb, reg = translate_expression env current_bb rhs in
let my_reg = allocate_register() in
append_instruction current_bb @@ I_Move (my_reg, reg);
- current_bb, (Environment.add_var id my_reg env)
+ current_bb, (Environment.add_var id my_reg env)
+ | STMT_VarDecl {var=VarDecl{id;_};init=None;_} ->
+ let my_reg = allocate_register() in
+ current_bb,(Environment.add_var id my_reg env)
+ | STMT_VarDecl {var=VarDecl{id;_};init=Some init} ->
+ let current_bb, reg = translate_expression env current_bb init in
+ let my_reg = allocate_register() in
+ let env = (Environment.add_var id my_reg env) in
+ append_instruction current_bb @@ I_Move (my_reg, reg);
+ current_bb,env
| STMT_Call call ->
translate_call env current_bb call []
| STMT_If {cond;then_branch;else_branch;_} ->
let end_bb =allocate_block() in
let else_bb = allocate_block() in
let current_bb = translate_condition env current_bb else_bb cond in
+
+ let current_bb,_ = translate_statement env current_bb then_branch in
+ let else_bb,_ = begin
+ match else_branch with
+ | None -> else_bb,env
+ | Some else_branch -> translate_statement env else_bb else_branch
+ end in
set_jump current_bb end_bb;
- set_jump else_bb end_bb;
+ set_jump else_bb end_bb;
+
end_bb,env
+
+ | STMT_Block block ->
+ let env,bb=translate_block env current_bb block
+ in bb,env
| _ ->
failwith "not yet implemented"