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author | Paweł Dybiec <pdybiec@stud.cs.uni.wroc.pl> | 2018-12-23 17:09:57 +0100 |
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committer | Paweł Dybiec <pdybiec@stud.cs.uni.wroc.pl> | 2018-12-23 17:09:57 +0100 |
commit | 3c2d40f55db9527d35b7ef2f1a25dfc82a19a842 (patch) | |
tree | 93f065f71be707433c60f13f2f161a97a0be472c /source/xi_lib/plugin.ml | |
parent | While (diff) |
Start of regalloc
Diffstat (limited to 'source/xi_lib/plugin.ml')
-rw-r--r-- | source/xi_lib/plugin.ml | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/source/xi_lib/plugin.ml b/source/xi_lib/plugin.ml index 33e6e4e..7069924 100644 --- a/source/xi_lib/plugin.ml +++ b/source/xi_lib/plugin.ml @@ -39,6 +39,9 @@ module type MAKE_MIPS_LOWER = functor (T:COMPILER_TOOLBOX) -> MIPS_LOWER module type MAKE_SPILLING = functor () -> SPILLING +module type MAKE_REGISTER_COALESCING = functor () -> REGISTER_COALESCING + + module type PLUGIN = sig val version: string @@ -82,4 +85,6 @@ module type PLUGIN = sig val make_spilling: (module MAKE_SPILLING) option val make_reachability_analysis: (module MAKE_REACHABILITY_ANALYSIS) option + + val make_register_coalescing: (module MAKE_REGISTER_COALESCING ) option end \ No newline at end of file |